Synchronous Circuits over Continuous Time: Feedback Reliability and Completeness

To what mathematical models do digital computer circuits belong? In particular: (i) (Feedback reliability.) Which cyclic circuits should be accepted? In other words, under which conditions is causally faithful the propagation of signals along closed cycles of the circuit? (ii) (Comparative power and completeness.) What are the appropriate primitives upon which circuits may be (or should be) assembled? There are well-known answers to these questions for circuits operating in discrete time, and they point on the exclusive role of the unit-delay primitive. For example: (i) If every cycle in the circuit N passes through a delay, then N is feedback reliable. (ii) Every finite-memory operator F is implementable in a circuit over unit-delay and pointwise boolean gates. In what form, if any, can such phenomena and results be extended to circuits operating in continuous time? This is the main problem considered (and, hopefully, solved to some extent) in this paper. In order to tackle the problems one needs more insight into specific properties of continuous time signals and operators that are not visible at discrete time.