The application of high level synthesis for implementation of lattice Boltzmann method in ARUZ

The paper presents the implementation results of D2Q9 Lattice Boltzmann method on ARUZ, a massively parallel FPGA-based simulator built in Lodz, Poland in 2015, optimized for execution of the Dynamic Lattice Liquid algorithm. The results of tests on a single ARUZ board indicate, that the LBM simulation of 864 × 384 lattice on 18 panels of ARUZ would reach the performance of 206 · 103 MLUPS (Million Lattice Updates per Second).

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Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2018).