Interconnections coupling through substrate for frequencies up to 100 GHz

This work presents a study on the substrate noise coupling between two interconnects. A highly, a lightly and a uniformly doped substrate, approximating most modern technologies, are described. The three different doping profiles are simulated for various interconnect distances and different metal layers assuming a 65 nm bulk CMOS technology. A proper data analysis methodology is presented, including z and s parameters extraction and de-embedding procedure.