VHDL-AMS Models for Current Conveyor Based Monolithic Operational Amplifiers

This paper focuses on analysis and behavioral modeling of second generation positive and negative current conveyors (CCII+s, CCII‒s), as well current-controlled current conveyors (CCCIIs). On the basis of the proposed CCII+ model improved behavioral models for three-terminal and four-termi-nal monolithic CFOAs are created. The models are developed by using VHDL analog and mixed-signal (VHDL-AMS) language and the descriptions are adapted to the SystemVision (version 5.5) simulation program, which is a part of the Mentor Graphics system. The proposed models simulate static and dynamic para-meters for differential and common-mode input signals at room temperature, including the parameters input offsets, accurate input impedances, non-dominant poles at differential input signals, AC common-mode rejection, PSRR effects, output impe-dances, slew rate limiting and terminal voltage/current operating ranges. The modeling parameters are extracted for commercially available four-terminal CFOA AD844A and CCCII OPA860 by analyzing semiconductor data books or through characterization measurements. For the validation process simulation and experi-mental results for sample electronic circuits are given.

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Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2019).