Design of low power analog front-end for 13.56MHz RFID transponder

This paper presents the design of 13.56MHz RF Front-end circuit for low-power medical applications. It converts RF power into DC and then extracts the clock and the data. The design includes rectifier, voltage multiplier, voltage regulator, data demodulator, ring oscillator, RF voltage limiter and LC matching network. It provides an excellent trade-off between high performance, simplicity of architecture, and low power consumption. It is designed to be fully integrated on chip. Simulation is done using 0.35-μm CMOS technology and the results are compared with other reported RFID systems. The total power consumption is adjusted to be around 4 μW at the minimum input power.

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Opracowanie rekordu w ramach umowy 509/P-DUN/2018 ze środków MNiSW przeznaczonych na działalność upowszechniającą naukę (2018).