Measuring Impedances of DC-biased Inductors by Using Vector Network Analyzers

This paper is devoted to a detailed experimentally based analysis of applicability of vector network analyzers for measuring impedance of surface mount inductors with and without DC bias. The measurements are made using custom-made bias tees and a test fixture with an ordinary vector network analyzer. The main attention in the analysis is focused on measurement accuracy of an impedance of surface mount inductors. Measurement results obtained with a vector network analyzer will also be compared to those obtained by using an impedance analyzer based on auto-balancing bridge method.

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This paper is partly based on a PhD thesis “Surface-Mount Component 3D Modelling in Frequency Range 150 kHz-100 MHz” defended by A. Asmanis in 2018 in the Riga Technical University.